XOR gates for low-energy and near-Vth operation

Azam Beg, Ajmal Beg, Amr Elchouemi

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    Abstract

    XOR gates are essential components of many logic circuits. With the aim of reducing energy dissipation, this paper proposes the use of genetic-algorithm-based optimization for XOR gates operating in the near-threshold region. We applied the proposed technique on four different types of XOR gates built using 22 nm devices. The resultant energy savings for the optimized gates ranged from 28% to 48% when compared with the traditionally-sized gates. The areas of the energy-optimized gates are also appreciably less than their conventional counterparts. The presented technique can be readily used for optimizing the gates for power, performance, noise-margin, etc.

    Original languageEnglish
    Title of host publication2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages49-52
    Number of pages4
    ISBN (Electronic)9781509002467
    DOIs
    Publication statusPublished - Mar 23 2016
    EventIEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015 - Cairo, Egypt
    Duration: Dec 6 2015Dec 9 2015

    Publication series

    NameProceedings of the IEEE International Conference on Electronics, Circuits, and Systems
    Volume2016-March

    Other

    OtherIEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015
    Country/TerritoryEgypt
    CityCairo
    Period12/6/1512/9/15

    ASJC Scopus subject areas

    • Electrical and Electronic Engineering

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