When one should consider Schmitt trigger gates

Valeriu Beiu, Walid Ibrahim, Mihai Tache, Fekri Kharbash

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

    4 Citations (Scopus)

    Abstract

    This paper compares classical CMOS logic gates with their Schmitt trigger (ST) versions, when sized both conventionally as well as unconventionally. The reason for studying ST logic gates is due to their positive feedback which leads to hysteresis and, more importantly, to their better static noise margins (SNMs)-than classical CMOS logic gates. Obviously, the larger SNMs make ST logic gates less sensitive to noises and, hence, more reliable. While lately, quite a few papers have been looking at using ST design concepts for implementing more reliable SRAM bit cells, significantly less work has been targeting combinatorial logic. Here we are going to explore the whole voltage range and performance spectrum, for a better understanding of not only the SNMs and power consumptions (at different frequencies and voltage levels) of ST NAND-2 gate, but also of the delays (speeds) they could achieve. This should give a clearer picture of the advantages/disadvantages of ST for combinatorial logic in advanced CMOS technology nodes, and implicitly identify their application range.

    Original languageEnglish
    Title of host publicationIEEE-NANO 2015 - 15th International Conference on Nanotechnology
    PublisherInstitute of Electrical and Electronics Engineers Inc.
    Pages682-685
    Number of pages4
    ISBN (Electronic)9781467381550
    DOIs
    Publication statusPublished - 2015
    Event15th IEEE International Conference on Nanotechnology, IEEE-NANO 2015 - Rome, Italy
    Duration: Jul 27 2015Jul 30 2015

    Publication series

    NameIEEE-NANO 2015 - 15th International Conference on Nanotechnology

    Other

    Other15th IEEE International Conference on Nanotechnology, IEEE-NANO 2015
    Country/TerritoryItaly
    CityRome
    Period7/27/157/30/15

    Keywords

    • CMOS
    • Schmitt trigger
    • logic gates
    • power
    • reliability
    • sizing
    • static noise margin (SNM)

    ASJC Scopus subject areas

    • Process Chemistry and Technology
    • Electrical and Electronic Engineering
    • Ceramics and Composites
    • Electronic, Optical and Magnetic Materials
    • Surfaces, Coatings and Films

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