VLSI Implementations of Threshold Logic - A Comprehensive Survey

Valeriu Beiu, José M. Quintana, María J. Avedillo

Research output: Contribution to journalReview articlepeer-review

196 Citations (Scopus)

Abstract

This paper is an in-depth review on silicon implementations of threshold logic gates that covers several decades. In this paper, we will mention early MOS threshold logic solutions and detail numerous very-large-scale integration (VLSI) implementations including capacitive (switched capacitor and floating gate with their variations), conductance/current (pseudo-nMOS and output-wired-inverters, including a plethora of solutions evolved from them), as well as many differential solutions. At the end, we will briefly mention other implementations, e.g., based on negative resistance devices and on single electron technologies.

Original languageEnglish
Pages (from-to)1217-1243
Number of pages27
JournalIEEE Transactions on Neural Networks
Volume14
Issue number5
DOIs
Publication statusPublished - Sep 2003
Externally publishedYes

Keywords

  • Integrated circuits
  • Neural-network (NN) hardware
  • Threshold logic
  • Very-large-scale integration (VLSI)

ASJC Scopus subject areas

  • Software
  • Computer Science Applications
  • Computer Networks and Communications
  • Artificial Intelligence

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