On using Schmitt trigger for digital logic

Valeriu Beiu, Mihai Tache

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper looks at a classical CMOS NOR-2 gate as well as Schmitt trigger (ST) versions, when the transistors are sized conventionally and unconventionally. ST gates exhibit positive feedback leading to better static noise margins (SNMs), hence less sensitive to noises (i.e., more reliable). The ST concept has lately been used for SRAM cells, with a few papers targeting digital logic. Here we explore the whole voltage and performance range, characterizing SNM, power, delay, and power-delay-product of ST NOR-2 gates, with the aim of getting a better understanding of their advantages for digital logic.

Original languageEnglish
Title of host publication2015 38th International Semiconductor Conference, CAS 2015 - Proceedings
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages197-200
Number of pages4
ISBN (Electronic)9781479988624
DOIs
Publication statusPublished - Dec 11 2015
Externally publishedYes
Event38th International Semiconductor Conference, CAS 2015 - Sinaia, Romania
Duration: Oct 12 2015Oct 14 2015

Publication series

NameProceedings of the International Semiconductor Conference, CAS
Volume2015-December

Conference

Conference38th International Semiconductor Conference, CAS 2015
Country/TerritoryRomania
CitySinaia
Period10/12/1510/14/15

Keywords

  • CMOS
  • NOR-2
  • Schmitt trigger
  • power
  • reliability
  • sizing
  • static noise margin (SNM)

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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