On the reliability of majority gates full adders

Walid Ibrahim, Valeriu Beiu, Mawahib Hussein Sulieman

    Research output: Contribution to journalArticlepeer-review

    57 Citations (Scopus)

    Abstract

    This paper studies the reliability of three different majority gates full adder (FA) designs, and compares them with that of a standard XOR-based FA. The analysis provides insights into different parameters that affect the reliability of FAs. The probability transfer matrix method is used to exactly calculate the reliability of the FAs under investigation. AU simulation results show that majority gates FAs are more robust than a standard XOR-based FA. They also show how different gates affect the FAs' reliabilities and are extrapolated to give reliability estimates from the device level. Such reliability analyses should be used for a better characterization of FA designs for future nanoelectronic technologies, in addition to the well-known speed and power consumption (which have long been used for selecting and ranking FA designs).

    Original languageEnglish
    Pages (from-to)56-67
    Number of pages12
    JournalIEEE Transactions on Nanotechnology
    Volume7
    Issue number1
    DOIs
    Publication statusPublished - Jan 2008

    Keywords

    • Full adders
    • Majority gates
    • Probability of failure
    • Probability transfer matrix
    • Reliability

    ASJC Scopus subject areas

    • Computer Science Applications
    • Electrical and Electronic Engineering

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